Principal Functional Verification Engineer
Job Description
Principal Functional Verification Engineer
A leading semiconductor company developing next-generation RISC-V SoCs and accelerators is seeking a Principal Functional Verification Engineer to lead the verification of complex hardware systems. You will collaborate with architecture, design, physical implementation and software teams to ensure systems achieve the highest levels of functionality, performance, and robustness.
Key Responsibilities:
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Analyze system and architecture requirements to develop detailed test and coverage plans.
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Design and maintain verification environments in SystemVerilog/UVM, SystemC, and C++, including stimulus, checkers, assertions, trackers, and coverage.
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Execute verification plans, including design bring-up, regression testing, and debug of failures.
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Perform HW/SW co-verification, simulation acceleration, and root-cause analysis of issues.
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Coordinate functional verification teams, mentor junior engineers, and drive methodology improvements.
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Collaborate across cross-functional teams to achieve verification closure and ensure comprehensive coverage.
Requirements:
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Master’s degree in a relevant field.
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15+ years of experience in verification of complex SoCs or IP blocks.
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Expertise in SystemVerilog/UVM, SystemC/C++, constrained random verification, functional coverage, formal verification and UPF.
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Experience with HW-SW co-verification and simulation; firmware-based verification is a plus.
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Familiarity with scripting (Bash, Perl, Python) and verification management tools.
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Strong leadership, problem-solving, and communication skills; ability to work in multicultural teams.
- Excellent English communication skills and ability to work autonomously and in multicultural teams.