Senior Staff Verification Engineer – Mixed Signal

September 4, 2026
Reference key: ES16765
Deadline date:

Job Description

Senior Staff Verification Engineer – Digital & Mixed Signal

Dublin | Hybrid | Permanent

The Role

An exciting opportunity has arisen for a Senior Staff Verification Engineer to join the R&D organisation of a global technology company developing next-generation semiconductor solutions.

Working at IP, subsystem and SoC level, you will play a key role in defining verification strategies, developing scalable verification environments and ensuring complex digital and mixed-signal designs meet their functional and performance requirements.

This is a technically influential role for an experienced verification engineer who enjoys working on advanced semiconductor technologies, improving verification methodologies and collaborating closely with design and post-silicon teams.

Key Responsibilities

  • Define verification strategies for digital and mixed-signal IP, subsystems and SoCs.

  • Develop scalable and reusable verification infrastructure, testbenches and test cases.

  • Apply verification methodologies including UVM, SystemVerilog and constrained-random verification.

  • Develop and execute detailed verification plans.

  • Create, debug and maintain constrained-random test suites.

  • Apply functional and code coverage to measure verification progress and identify gaps.

  • Support gate-level and power-aware verification activities.

  • Collaborate closely with design teams throughout the development lifecycle.

  • Support post-silicon teams with device bring-up and validation activities.

  • Identify opportunities to improve verification methodologies, automation and overall efficiency.

  • Contribute technical expertise to complex verification challenges and mentor less experienced engineers.

Technical Expertise

  • Strong experience in digital and/or mixed-signal verification.

  • Excellent knowledge of SystemVerilog, UVM and verification methodologies.

  • Experience developing complex testbenches and verification environments.

  • Strong understanding of functional and code coverage.

  • Experience with constrained-random and directed verification approaches.

  • Knowledge of gate-level and power-aware verification.

  • Understanding of digital and mixed-signal design principles.

  • Familiarity with interfaces and protocols such as AMBA, AXI, AHB, SPI, UART or LIN would be advantageous.

  • Experience with formal verification would be beneficial.

Experience & Qualifications

  • Master’s degree in Electrical/Electronic Engineering with approximately 5–7 years’ experience, or Bachelor’s degree with 7–9 years’ relevant experience.

  • Proven experience in semiconductor verification, ideally at IP, subsystem or SoC level.

  • Strong analytical and problem-solving skills.

  • Ability to work across multiple projects and manage competing priorities.

  • Strong communication and collaboration skills.

  • A proactive approach to improving verification processes and methodologies.

  • Experience in automotive semiconductor or functional safety / ISO 26262 environments would be advantageous.

  • Excellent English communication skills.

What’s on Offer

  • Join a global R&D organisation working on next-generation semiconductor technologies.

  • Work on complex digital and mixed-signal IP and SoC verification.

  • Opportunity to influence verification strategy, infrastructure and methodologies.

  • Collaborate with highly skilled design, verification and post-silicon engineering teams.

  • Exposure to advanced verification techniques and technologies.

  • Strong opportunities for technical development and career progression.

  • Hybrid working environment in Dublin.